This invention relates generally to measurement of capacitance, and in particular to a method of optimizing timing parameters to provide fast capacitance measurement.
Capacitance measurement has become an important feature of measuring instruments such as digital multimeters. U.S. Pat. Nos. 5,073,757 and 5,136,251, both of which are assigned to Fluke Corporation, disclose methods of measuring small and large capacitances in which an unknown capacitor was allowed to fully charge to a reference voltage at its RC rate, while at the same time a current proportional to the charging current was accumulated on the storage capacitor of a dual-slope integrating analog-to-digital converter (ADC). Small capacitances could fully charge in one integrate cycle of the ADC, while large capacitances required several integrate cycles to fully charge. In both cases, the proportional charge stored on the integrating ADC's storage capacitor was removed during "de-integrate" cycles over periods of time dictated by the amount of stored charge, and the time was measured to give an indication of capacitance value.
Not only were these prior art capacitance measurement techniques unsatisfactory due to inordinately long measurement times because of the wait for the unknown capacitor to charge fully, but they were incompatible with the timing and mechanics of multislope integrating ADCs that began to supplant dual-slope integrating ADCs.
Multislope ADCs, an example of which is disclosed in U.S. Pat. No. 5,321,403, assigned to Fluke Corporation, exhibit faster and more accurate measurements than the dual-slope ADCs. That is, rather than the single-slope integrate cycle of a dual-slope ADC, multi-slope ADCs add and remove known amounts of charge during the integrate cycle to keep the final stored charge at a relatively low value. This of course results in a substantially reduced "de-integrate cycle" in which the final quantity is measured very quickly and algebraically summed with the known added or subtracted charges.
The foregoing difficulties were overcome by the improved capacitance measurement system disclosed in corresponding U.S. patent application Ser. No. 09/267,504, filed Mar. 12, 1999, wherein the improvement included use of a constant current source to generate a linear ramp voltage across the capacitor being measured. Both measurement speed and accuracy were improved for a wide range of capacitors; however, for large capacitors in particular, long time periods, e.g., up to several minutes for an incompletely discharged 50,000 .mu.F capacitor, were still required to accurately determine the capacitance value.